The inventive concept relates to memory controller, memory systems, and methods of operating same. More particularly, the inventive concept relates to non-volatile memory controllers, non-volatile memory systems, and operating methods for same.
Non-volatile memory, such as flash memory, has become a staple component in many different types of contemporary electronics and digital computational systems. Non-volatile memory is operatively associated with a “host” that controls the exchange of data to/from the non-volatile memory and/or the execution of various operations by the non-volatile memory. The generic combination of non-volatile memory with a memory controller may be termed a “memory system”. Memory systems may then in turn be operatively combined with a host in different systems. There are many different types of memory systems, such as the so-called solid state drive (SSD), various memory cards (e.g., secure digital (SD) cards and multimedia cards (MMCs), etc.
In a memory system configured with flash memory, the size of data processed by an associated host is often different from the size of a data (e.g., page data) processed in the flash memory. This difference must be accounted for during read and write (or program) operations. For example, during a write operation in a SD card or MMC, the host may send burst data of 512 bytes to the memory system during respective data transfer periods (a “busy period”). Each busy period may be limited to no more than 250 msec. Despite the duration of the busy period defined by the host, the constituent flash memory of the SD card or MMC may programmed according to a defined data page size (e.g., 2, 4 or 8 KB per pages). Hence, since the size of the page data, as processed by the flash memory, is different from the size of data transferred during a busy period, busy periods will not be uniformly distributed but will occur in clusters during a given time period.
In addition, when certain long-duration, data processing events, such as a merge operation, are required, the corresponding busy period may increase. Accordingly, various approaches have been introduced that seek to avoid busy period “time-outs” that would otherwise occur due to mismatches between host-defined busy period durations and memory system operation periods. However, there remains no real fundamental approach to effectively extending busy period(s) for many hosts, and conventional memory systems are left with no other option but to manipulate (combine or divide) available busy periods in order to perform necessary operations.